Hi there, I'm Sagarđź‘‹
I try to solve some of the difficult problems in the VLSI industry, typically in the domains of Synthesis, Sign-Off and Low-Power using Computer Aided Design (CAD) algorithms and tools (occasionally using Machine Learning).
Education
2015 - 2019
National Institute of Technology, Rourkela
Bachelors of Technology, Electronics and Communication Engineering.
Publications
ISCAS 2022
AxLEAP
Enabling Low-Power Approximations Through Unified Power Format
ISCAS 2022
ART-MAC
Approximate Rounding and Truncation Based MAC Unit for Fault-Tolerant Applications
ISQED 2022
EFCSA
An Efficient Carry Speculative Approximate Adder with Rectification
ISQED 2022
HPAM
An 8-bit High-Performance Approximate Multiplier Design for Error Resilient Applications
ISCAS 2021
SAM
A Segmentation based Approximate Multiplier for Error Tolerant Applications
MEMSYS 2022
CRATAR
A Case for Amplifying Row Hammer Attacks via Cell-Coupling in DRAM Devices